Posts Tagged ‘Protocol layer’


USB Power Delivery: looking for a tester?

March 6, 2014

I attended the USB Power Delivery Interoperability event in Portland on middle of Jan. The opportunity was to test the CT20600 USB-PD complete solution from Canova Tech.

During the test sessions, I had the opportunity to touch the new USB test solution from Ellisys, a worldwide leader in protocol test and analysis solutions. The USB Explorer 350, just announced in the company news,  is intended for technology developers working on products employing features specified in the recently released USB Power Delivery specification.

Ellisys EX350

Waiting for the USB Power Delivery compliance procedures delivery from, the USB Explorer 350 could be a valid and powerful instrumentation helping developers to characterize protocol compliance of silicon, software, and systems and to verify corner case communications. The device can be configured to play as a protocol analyze by sniffing the communication between two USB-PD devices or as emulator (producer or consumer).


It comes with a powerful software GUI that enable a complete monitor, analysis and control of the communication protocol. For a detailed description and list of features, please check product page.

A USB-PD Analyzer and Emulator is a great tool for developers and designer to test their products and to be ready for final product qualification and compliance tests. The Ellisys  USB Explorer 350 is the first solution in the market, most probably not the only one in the short term. I’ll check the web for other solutions and/or similar products.


Developing a USB Power Delivery device? Let’s talk about solutions!

July 1, 2013

Are you thinking to develop or evaluate an USB-PD device? If yes, I’m sure the first problem you are facing is the unavailability of USB-PD semiconductor solutions to build your concept board and of USB-PD enabled products to be used as peer for your system (at least at this date). This is for sure a major issue to assess the system requirements and to evaluate the performances. The possibility to have a USB-PD evaluation board permits the engineering team to start playing with this new protocol, to build the system and to start the implementation and debug of the high level functionalities.

Up to date two solutions are available in the market: one coming from Obsidian Technology and one from Canova Tech.

Everything I know about Obsidian can be found in the website. They came as first in the market with an USB-PD solution and they are offering an USB-PD development board  (OTS9102) based on a proprietary IC (OTI9121) implementing the physical layer (PHY).


More I can say about Canova Tech (sorry, it’s the company I’m working for!). It’s currently developing an USB-PD PHY block, the CT20600.

The CT20600 is a USB-PD compliant PHY IP implementing all the features described in the current USB-PD specifications. The block can be integrated in a more complex power management unit (see previous post) or in standalone device for cost sensitive applications. The CT20600 can be ported to most of the analog CMOS processes available in the market.

CT20600 DVLP Board 1V1

A development board has been developed in order to assess the architecture and to implement the digital blocks of the PHY and the upper layers, like the protocol layer. Waiting for the incoming silicon samples, at the moment the board v1.1 implements the analog parts of the USB-PD PHY using discrete components and the digital blocks in a FPGA.

A detailed description of this board will follow soon.

Any comment and feedback is welcome.
Stay tuned.


Interview with S.Carlsen, commitee member for USB Power Delivery standardization

April 3, 2013

After my recent posts (USB-PD IntroPHYProtocol Layer) about USB Power Delivery, I had the chance to come in touch with great people and I started with them interesting and promising discussions. In the early phases of any new emerging technology it’s always important to build a wide network of  interest, competences and contributions.


In this sense, it is a pleasure to introduce Sten Carlsen, a member of the standardization committee of the USB-PD. Having covered this active role, Sten can help to better understand the new standard and read it out of the specification. Below the interview I had with him.

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USB-PD: Protocol Layer explained

March 27, 2013

After my previous post regarding the Power Delivery PHY, it’s now time to introduce the Protocol Layer (PL).USB-PD Stack PL

The PL communicates with the lower PHY layer and with the upper Policy Engine and it is responsible to form the messages used to communicate information between a pair of USB-PD ports.

It receives inputs from the Policy Engine indicating which messages to send and indicates the responses back to the Policy Engine. But it is responsible to  form Capabilities messages, requests and acknowledgements and ping packets. It implements counters for packet numbering and dedicated timer for timeouts.

The basic protocol uses a push model where the Provider pushes it capabilities to the Consumer that in turn responds with a request based on the offering. However, the Consumer may asynchronously request the Provider’s present capabilities and may select another voltage/current.

The PL architecture is based on timers, state machines and counters, see the picture, and it’s a pure digital implementation. Below a brief description of each block.


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