USB Power Delivery: PHY explained

March 14, 2013

USB-PD iconsThe new USB Power Delivery standard (USB-PD) will enable devices to deliver or sink power  over USB cable up to 100W in 6 power profiles.  And hopefully it will simplify our life, currently busy with power adapters, battery chargers and connectors. In a previous post of mine, the main features of the USB-PD have been presented.

The USB-PD defines a protocol that enable the producer and the consumer device to negotiate the power capabilities and to tailor dinamically the actual power needs. To be compatible with the classic standard USB2.0 and USB3.0, this communication protocol has been specified as a powerline communication (PLC) over VBUS, as depicted in a simplified architecture below. In this configuration the USB-PD PHY in not interfering with the standard communication bus of a USB port and in principle nothing is preventing to have a separate and standalone USB-PD device.
usb-pd architecture

The USB-PD communication protocol is an half-duplex, FSK modulated channel. The frequency carrier is 23.2MHz and the FSK frequency deviation 500KHz. The bit rate is 300 Kbps.

The USB-PD PHY interfaces the VBUS wire only. An inductor is required to isolate the transceiver and the channel from the noisy power supply or load.

The USB-PD standard Specification doesn’t enter in implementation details, but I believe the most probable implementation will use an AC coupling with the VBUS, as depicted above. This approach permits to use low voltage silicon voltage processes, as the capacitor blocks the DC component of the VBUS that can be as high as 20V nominal.

In the above architecture, no mention of the standard USB interface, that it completely separated and independent. It will be interesting to investigate in another post how to protect the VBUS input in case of USB-PD functionality.


The TX block receives data to be sent from the upper layer (protocol layer). The functions to be implemented are:
  1. Receive incoming data from upper layer
  2. Append the calculated CRC
  3. 4b5b encode to avoid DC component in the data stream
  4. Insert  preamble and packet delimiters
  5. FSK Modulator
  6. VUSB Drive with a bandpass filter

usb-pd tx

Without enter in implementation details, part of the TX block involves pure digital design. It will be interesting to investigate the implementation of the FSK modulator. The 4b5b encoder avoids DC component in the data stream. The  preamble makes the clock synchronization easier and the packet delimiters make the packet sync easier at the RX side.


The RX block should receive data on the VBUS and send the payload data to the upper layer (protocol layer). The functions to be implemented are:
  1. PassBand Filter
  2. Squelch Detector
  3. FSK Demodulator
  4. Extract payload
  5. 4b5b Decoder
  6. CRC check
  7. Data to upper layer

usb-pd rx

The most interesting part of the RX is the FSK demodulator, as there are many alternative implementations. A coming post will be dedicated to this topic.

The RX squelch detector is requested to minimize the power consumption of the RX block when no data communication on VBUS. The CRC calculation and validation permits to discharge corrupted packets. Only bit-wise correct packet will be delivered to the upper layer (protocol layer).



  1. Great to see some interest in this.

    A few comments on the article:
    Stand-alone chargers have been foreseen by the committee.
    For isolation you can also use a resonant circuit, provided you can make it fulfil the impedance requirements. The inductor is by far the simple solution;1uH is the recommended value.
    The 4b5b code does not prevent DC-bias but reduces it, the main reason for using it is to ensure sufficient transitions to simplify clock recovery.
    The TX-filter can likely just be low-pass.
    We looked at many different modulator designs to be sure not to exclude more than necessary. Purely digital designs are possible, even in lower cost.
    The RX-squelch detector is also used in the cable detection circuit, if you use the example implementation given.
    The benefit of the packet delimiters in the RX is that otherwise you would have to interpret the packet content. They were put there to avoid that the PHY-layer should have to look into the packet content.

    I look forward to the next instalments of this series.

    I should mention that my views are probably coloured by the fact that I was part of writing this spec.

    • Great to have your comments, Sten. I will follow up your suggestions and I will modify the article soon.
      I’m trying indeed to verify the interest around this new USB standard: it’s out since Aug. 2012 and no products are availaible (devices, cables, connectors) so far. I’m exploring for my company (www.canovatech.com) the possibility to develop a silicon IP to the market.
      Please stay tuned for and follow my next posts: your support and contribution will be more than welcome.

  2. Great to see your blog, Andrea!

    • Thanks for the comment. It’s always a pleasure to have positive feedbacks and appreciations. Thanks again.
      Keep following me.

  3. […] Tech (sorry, it’s the company I’m working for!). It’s currently developing an USB-PD PHY block, the […]

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